This background section is provided for the purpose of generally describing the context of the disclosure. Work of the presently named inventor(s), to the extent the work is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure.
Integrated circuits may include a bus for transporting data within the integrated circuit, and to and from the integrated circuit through bus ports. During development of such integrated circuits, it is often desirable to record activity on the bus, for example to support testing, debugging, performance tuning, and the like.
One approach employs external test devices such as bus-tracing devices and bus-analyzing devices. FIG. 1 illustrates this approach. Referring to FIG. 1, an external bus-analyzing device 102 is connected by test cables 104A and 104B between an integrated circuit 106 and a bus partner 108. The integrated circuit 106 includes one or more functional modules 110 that are connected to a bus 112. The integrated circuit 106 generally includes at least one bus port 114. In such arrangements, the first test cable 104A is generally connected to one of the bus ports 114. In other arrangements, the first test cable 104A is connected by probes to probe nodes of the bus 112.
Another approach is to include error information registers in the integrated circuit 106. These registers collect error information during testing.